// *********************************************************************************
// Project Name : fix priority arbiter
// Author       : xfsong
// Email        : 1293993416@qq.com
// Create Time  : 2024-05-06
// File Name    : .v
// Module Name  :
// Called By    :
// Abstract     :another method to achieve fix_priority arbiter
//
// 
// *********************************************************************************
// Modification History:
// Date         By              Version                 Change Description
// -----------------------------------------------------------------------
// 2024-05-06    Macro           1.0                     Original
//  
// *********************************************************************************

module fix_priority2(
    input READY0, READY1, READY2, READY3, 
    input READY4, READY5, READY6, READY7,
    output [7:0] GRANT
);

wire [7:0] ready;
assign ready = {READY7, READY6, READY5, READY4, READY3, READY2, READY1, READY0};// READY0 has the highest priority

assign GRANT = (~(ready - 8'd1)) & ready; //8'd1 here is the outcome of ready-input 1000_0000 -------- round here is that the highest priority goes round towards left

endmodule


